qmk

QMK Firmware
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mcuconf.h (5998B)


      1 /*
      2     ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
      3     Licensed under the Apache License, Version 2.0 (the "License");
      4     you may not use this file except in compliance with the License.
      5     You may obtain a copy of the License at
      6         http://www.apache.org/licenses/LICENSE-2.0
      7     Unless required by applicable law or agreed to in writing, software
      8     distributed under the License is distributed on an "AS IS" BASIS,
      9     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     10     See the License for the specific language governing permissions and
     11     limitations under the License.
     12 */
     13 
     14 #ifndef _MCUCONF_H_
     15 #define _MCUCONF_H_
     16 
     17 /*
     18  * STM32F0xx drivers configuration.
     19  * The following settings override the default settings present in
     20  * the various device driver implementation headers.
     21  * Note that the settings for each driver only have effect if the whole
     22  * driver is enabled in halconf.h.
     23  *
     24  * IRQ priorities:
     25  * 3...0       Lowest...Highest.
     26  *
     27  * DMA priorities:
     28  * 0...3        Lowest...Highest.
     29  */
     30 
     31 #define STM32F0xx_MCUCONF
     32 
     33 /*
     34  * HAL driver system settings.
     35  */
     36 #define STM32_NO_INIT                       FALSE
     37 #define STM32_PVD_ENABLE                    FALSE
     38 #define STM32_PLS                           STM32_PLS_LEV0
     39 #define STM32_HSI_ENABLED                   TRUE
     40 #define STM32_HSI14_ENABLED                 TRUE
     41 #define STM32_HSI48_ENABLED                 FALSE
     42 #define STM32_LSI_ENABLED                   TRUE
     43 #define STM32_HSE_ENABLED                   FALSE
     44 #define STM32_LSE_ENABLED                   FALSE
     45 #define STM32_SW                            STM32_SW_PLL
     46 #define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2
     47 #define STM32_PREDIV_VALUE                  1
     48 #define STM32_PLLMUL_VALUE                  12
     49 #define STM32_HPRE                          STM32_HPRE_DIV1
     50 #define STM32_PPRE                          STM32_PPRE_DIV1
     51 #define STM32_ADCSW                         STM32_ADCSW_HSI14
     52 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
     53 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
     54 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4
     55 #define STM32_ADCSW                         STM32_ADCSW_HSI14
     56 #define STM32_USBSW                         STM32_USBSW_HSI48
     57 #define STM32_CECSW                         STM32_CECSW_HSI
     58 #define STM32_I2C1SW                        STM32_I2C1SW_HSI
     59 #define STM32_USART1SW                      STM32_USART1SW_PCLK
     60 #define STM32_RTCSEL                        STM32_RTCSEL_LSI
     61 
     62 /*
     63  * ADC driver system settings.
     64  */
     65 #define STM32_ADC_USE_ADC1                  FALSE
     66 #define STM32_ADC_ADC1_DMA_PRIORITY         2
     67 #define STM32_ADC_IRQ_PRIORITY              2
     68 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2
     69 
     70 /*
     71  * EXT driver system settings.
     72  */
     73 #define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3
     74 #define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3
     75 #define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3
     76 #define STM32_EXT_EXTI16_IRQ_PRIORITY       3
     77 #define STM32_EXT_EXTI17_IRQ_PRIORITY       3
     78 
     79 /*
     80  * GPT driver system settings.
     81  */
     82 #define STM32_GPT_USE_TIM1                  FALSE
     83 #define STM32_GPT_USE_TIM2                  FALSE
     84 #define STM32_GPT_USE_TIM3                  FALSE
     85 #define STM32_GPT_USE_TIM14                 FALSE
     86 #define STM32_GPT_TIM1_IRQ_PRIORITY         2
     87 #define STM32_GPT_TIM2_IRQ_PRIORITY         2
     88 #define STM32_GPT_TIM3_IRQ_PRIORITY         2
     89 #define STM32_GPT_TIM14_IRQ_PRIORITY        2
     90 
     91 /*
     92  * I2C driver system settings.
     93  */
     94 #define STM32_I2C_USE_I2C1                  FALSE
     95 #define STM32_I2C_USE_I2C2                  FALSE
     96 #define STM32_I2C_BUSY_TIMEOUT              50
     97 #define STM32_I2C_I2C1_IRQ_PRIORITY         3
     98 #define STM32_I2C_I2C2_IRQ_PRIORITY         3
     99 #define STM32_I2C_USE_DMA                   TRUE
    100 #define STM32_I2C_I2C1_DMA_PRIORITY         1
    101 #define STM32_I2C_I2C2_DMA_PRIORITY         1
    102 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
    103 
    104 /*
    105  * ICU driver system settings.
    106  */
    107 #define STM32_ICU_USE_TIM1                  FALSE
    108 #define STM32_ICU_USE_TIM2                  FALSE
    109 #define STM32_ICU_USE_TIM3                  FALSE
    110 #define STM32_ICU_TIM1_IRQ_PRIORITY         3
    111 #define STM32_ICU_TIM2_IRQ_PRIORITY         3
    112 #define STM32_ICU_TIM3_IRQ_PRIORITY         3
    113 
    114 /*
    115  * PWM driver system settings.
    116  */
    117 #define STM32_PWM_USE_ADVANCED              FALSE
    118 #define STM32_PWM_USE_TIM1                  FALSE
    119 #define STM32_PWM_USE_TIM2                  FALSE
    120 #define STM32_PWM_USE_TIM3                  FALSE
    121 #define STM32_PWM_TIM1_IRQ_PRIORITY         3
    122 #define STM32_PWM_TIM2_IRQ_PRIORITY         3
    123 #define STM32_PWM_TIM3_IRQ_PRIORITY         3
    124 
    125 /*
    126  * SERIAL driver system settings.
    127  */
    128 #define STM32_SERIAL_USE_USART1             FALSE
    129 #define STM32_SERIAL_USE_USART2             FALSE
    130 #define STM32_SERIAL_USART1_PRIORITY        3
    131 #define STM32_SERIAL_USART2_PRIORITY        3
    132 
    133 /*
    134  * SPI driver system settings.
    135  */
    136 #define STM32_SPI_USE_SPI1                  FALSE
    137 #define STM32_SPI_USE_SPI2                  FALSE
    138 #define STM32_SPI_SPI1_DMA_PRIORITY         1
    139 #define STM32_SPI_SPI2_DMA_PRIORITY         1
    140 #define STM32_SPI_SPI1_IRQ_PRIORITY         2
    141 #define STM32_SPI_SPI2_IRQ_PRIORITY         2
    142 #define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
    143 
    144 /*
    145  * ST driver system settings.
    146  */
    147 #define STM32_ST_IRQ_PRIORITY               2
    148 #define STM32_ST_USE_TIMER                  2
    149 
    150 /*
    151  * UART driver system settings.
    152  */
    153 #define STM32_UART_USE_USART1               FALSE
    154 #define STM32_UART_USE_USART2               FALSE
    155 #define STM32_UART_USART1_IRQ_PRIORITY      3
    156 #define STM32_UART_USART2_IRQ_PRIORITY      3
    157 #define STM32_UART_USART1_DMA_PRIORITY      0
    158 #define STM32_UART_USART2_DMA_PRIORITY      0
    159 #define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
    160 
    161 /*
    162  * USB driver system settings.
    163  */
    164 #define STM32_USB_USE_USB1                  TRUE
    165 #define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
    166 #define STM32_USB_USB1_LP_IRQ_PRIORITY      3
    167 
    168 #endif /* _MCUCONF_H_ */